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Let VDD 15 V; VGG 1 V; and RD 2:5 k . (a) Find the range of values of IDQ that could be expected in using this FET. (b) Find the corresponding range of VDSQ . (c) Comment on the desirability of this bias arrangement.

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(a) The maximum and minimum transfer characteristics are plotted in Fig. 5-14, based on (4.2). Because VGSQ VGG 1 V is a xed quantity una ected by IDQ and VDSQ , the transfer bias line extends vertically at VGS 1, as shown. Its intersections with the two transfer characteristics give IDQ max % 5:5 mA and IDQ min % 1:3 mA.

CHAP. 23]

Fig. 5-14 (b) For IDQ IDQ max , KVL requires that VDSQ max VDD IDQ max RD 15 5:5 2:5 1:25 V And, for IDQ min , VDSQ min VDD IDQ min RD 15 1:3 2:5 11:75 V

CHAP. 5]

The spread in FET parameters (and thus in transfer characteristics) makes the xed-bias technique an undesirable one: The value of the Q-point drain current can vary from near the ohmic region to near the cuto region.

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Fig. 23-8 (iii) Concavity (iv) Vertical and horizontal asymptotes (if any) (v) Behavior as x approaches + and The procedure was illustrated for the function f (x) = 2x 3 + x 2 4x + 2 in Section 23.2. An additional example follows. EXAMPLE Sketch the graph of the rational function

6

The self-biased JFET of Fig. 4-19 has a set of worst-case shorted-gate parameters that yield the plots of Fig. 5-15. Let VDD 24 V; RD 3 k ; RS 1 k ; and RG 10 M . (a) Find the range of IDQ that can be expected. (b) Find the range of VDSQ that can be expected. (c) Discuss the idea of reducing IDQ variation by increasing the value of RS .

(a) Since VGG 0, the transfer bias line must pass through the origin of the transfer characteristics plot, and its slope is 1=RS (solid line in Fig. 5-15). From the intersections of the transfer bias line and the transfer characteristics, we see that IDQ max % 2:5 mA and IDQ min % 1:2 mA.

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x f (x) = 2 x +1 First of all, the function is odd [that is, f ( x) = f (x)], so that it need be graphed only for positive x. The graph is then completed by re ection in the origin (see Section 7.3). Compute the rst two derivatives of f , f (x) = (x 2 + 1)Dx (x) xDx (x 2 + 1) x 2 + 1 x(2x) 1 x2 = = 2 2 + 1)2 2 + 1)2 (x (x (x + 1)2 (x 2 + 1)2 Dx (1 x 2 ) (1 x 2 )Dx ((x 2 + 1)2 ) (x 2 + 1)4

Fig. 5-15 (b) For IDQ IDQ max , KVL requires that VDSQ max VDD IDQ max RS RD 24 2:5 1 3 14 V And, for IDQ min , VDSQ min VDD IDQ min RS RD 24 1:2 1 3 19:2 V (c) The transfer bias lines for RS 2 k and 3 k are also plotted on Fig. 5-15 (dashed lines). An increase in RS obviously does decrease the di erence between IDQ max and IDQ min ; however, in the process IDQ is reduced to quite low values, so that operation is on the nonlinear portion of the drain characteristics near the ohmic region where appreciable signal distortion results. But if self-bias with an external source is utilized (see Problems 5.27 and 5.48), the transfer bias line can be given a small negative slope without forcing IDQ to approach zero.

In the JFET circuit of Fig. 4-5(a), using self-bias with an external source, VDD 24 V and RS 3 k . The JFET is characterized by worst-case shorted-gate parameters that result in

f (x) = Dx f (x) = =

the transfer characteristics of Fig. 5-16. (a) Find the range of IDQ that can be expected if R1 1 M and R2 3 M . (b) Find the range of IDQ that can be expected if R1 1 M and R2 7 M . (c) Discuss the signi cance of the results of parts a and b.

In This :

Fig. 5-16

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