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f (x) f (a) (x a) + f (a) = lim x a x a f (x) f (a) = lim lim (x a) + f (a) x a x a x a = f (a) 0 + f (a) = f (a) Thus, f is continuous at a. This proves: Theorem 13.1: If f is differentiable at a, then f is continuous at a. EXAMPLE Differentiability is a stronger condition than continuity. In other words, the converse of Theorem 13.1 is not true. To see this, consider the absolute-value function f (x) = |x| (see Fig. 13-1). f is obviously continuous at x = 0; but it is not differentiable at x = 0. In fact,

17

The Si transistor of Fig. 3-23 has negligible leakage current, and 100. VEE 4 V; RE 3:3 k , and RC 7:1 k , nd (a) IBQ and (b) VCEQ .

If VCC 15 V,

f (0 + h) f (0) h 0 = lim = lim 1 = 1 + h h h 0 h 0+ f (0 + h) f (0) h 0 lim = lim = lim 1 = 1 h h h 0 h 0 h 0

Fig. 3-23 (a) By KVL around the base-emitter loop, IEQ Then, by (3.1) and (3.2), IBQ (b) KVL and (2) of Problem 3.17 yield VCEQ VCC VEE IEQ RE ICQ RC VCC VEE RE RC IEQ 1 100 3 3 3 15 4 3:3 10 7:1 10 1 10 8:67 V 100 1 IEQ 1 10 3 9:9 A 1 100 1 VEE VBEQ 4 0:7 1 mA RE 3:3 103

For the transistor circuit of Fig. 3-23, CC 100 F, RE 3:3 k ; RC 8:1 k ; RL 15 k , VCC 15 V; VEE 4 V, and vS 0:01 sin 2000 t V. The transistor can be described by the generic npn model. Use SPICE methods to (a) determine the quiescent voltage VCEQ and (b) plot the input and output currents and voltages.

and so the two-sided limit needed to de ne f (0) does not exist. (The sharp corner in the graph is a tip-off. Where there is no unique tangent line, there can be no derivative.)

CHAP. 3]

In This :

Prb3_24.CIR - CB amplifier vs 1 0 SIN(0V 10mV 1kHz) CC1 1 2 100uF RE 2 4 3.3kohm VEE 0 4 4V Q 3 0 2 QNPNG RC 3 5 8.1k VCC 5 0 15V CC2 3 6 100uF RL 6 0 15kohm .MODEL QNPNG NPN(Is=10fA Ikf=150mA Isc=10fA Bf=150 + Br=3 Rb=1ohm Rc=1ohm Va=30V Cjc=10pF Cje=15pF) .DC VCC 15V 15V 1V .PRINT DC V(3,2) .TRAN 1us 1ms .PROBE .END

Theorem 13.1 will enable us to justify Rule 3, the product rule, of 12 and to establish two additional rules.

After executing hPrb3_24.CIRi, examine the output le to nd VCEQ V 3; 2 7:47 V. VCEQ VCC =2, the transistor is biased for maximum symmetrical swing.

(b) Use the Probe feature of PSpice to plot the input and output currents and voltages as displayed by Fig. 3-24. Notice that this circuit ampli es the output voltage while the output current is actually less in amplitude than the input current.

Fig. 13-1 If f and g are differentiable at x and if g(x) = 0, then Dx For a proof, see Problem 13.2. EXAMPLES

Fig. 3-24

Find the proper collector current bias for maximum symmetrical (or undistorted) swing along the ac load line of a transistor ampli er for which VCEsat ICEO 0.

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(a) Dx x+1 x2 2 = (x 2 2) Dx (x + 1) (x + 1) Dx (x 2 2) (x 2 2)2 (x 2 2)(1) (x + 1)(2x) x 2 2 2x 2 2x = 2 2)2 (x (x 2 2)2 x 2 2x 2 x 2 + 2x + 2 = 2 2 2)2 (x (x 2)2

For maximum symmetrical swing, the Q point must be set at the midpoint of the ac load line. Hence, from (3.13), we want 1 1 VCEQ ICQ iC max ICQ 1 2 2 Rac

which becomes an equality if no emitter resistor is present. Substituting (2) into (1), assuming equality, and solving for ICQ yield the desired result: ICQ VCC Rac Rdc 3

In the circuit of Fig. 3-8(a), RE 300 ; RC 500 ; VCC 15 V; 100, and the Si transistor has -independent bias. Size R1 and R2 for maximum symmetrical swing if VCEsat % 0.

RULE 6 (Quotient Rule).