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Norton s theorem states that an arbitrary linear, one-port network such as network A in Fig. 1-4(a) can be replaced at terminals 1,2 by an equivalent parallel-connected current source IN and admittance YN as shown in Fig. 1-4(c). IN is the short-circuit current that ows from terminal 1 to terminal 2 due to network A, and YN is the ratio of short-circuit current to open-circuit voltage at terminals 1,2 with network B disconnected. If network A or B contains a controlled source, its controlling variable must be in that same network. It is apparent that YN 1=ZTh ; thus, any method for determining ZTh is equally valid for nding YN .

CHAP. 1]

[by algebra:

Example 1.5. Use SPICE methods to determine the Thevenin equivalent circuit looking to the left through terminals 3,0 for the circuit of Fig. 1-7.

Fig. 1-7

multiply top and bottom by g(x)g(x + h)] [by algebra] [by Property IV of limits]

In SPICE independent source models, an ideal voltage source of 0 V acts as a short circuit and an ideal current source of 0 A acts as an in nite impedance or open circuit. Advantage will be taken of these two features to solve the problem. Load resistor RL of Fig. 1-7(a) is replaced by the driving point current source Idp of Fig. 1-7(b). The netlist code that follows forms a SPICE description of the resulting circuit. The code is set up with parameter-assigned values for V1 ; I2 , and Idp .

Solution: Cash 12,000 Supplies 1,400 Equipment 22,600 Furniture 10,000 Accounts Payable 3,500 P. Wallace, Capital 42,500

Ex1_5.CIR - Thevenin equivalent circuit .PARAM V1value=0V I2value=0A Idpvalue=1A V1 1 0 DC {V1value} R1 1 2 1ohm I2 0 2 DC {I2value} R2 2 0 3ohm R3 2 3 5ohm G3 2 3 (1,0) 0.1 ; Voltage-controlled current-source Idp 0 3 DC {Idpvalue} .END

If both V1 and I2 are deactivated by setting V1value=I2value=0, current Idp 1 A must ow through the Thevenin equivalent impedance ZTh RTh so that v3 Idp RTh RTh . Execution of <Ex1_5.CIR> by a SPICE program writes the values of the node voltages for nodes 1, 2, and 3 with respect to the universal ground node 0 in a le <Ex1_5.OUT>. Poll the output le to nd v3 V 3 RTh 5:75 . In order to determine VTh (open-circuit voltage between terminals 3,0), edit <Ex1_5.CIR> to set V1value=10V, I2value=2A, and Idpvalue=0A. Execute <Ex1_5.CIR> and poll the output le to nd VTh v3 V 3 14 V. Example 1.6. Find the Norton equivalent current IN and admittance YN for the circuit of Fig. 1-5 with values as given in Example 1.3. The Norton current is found as the short-circuit current from terminal 1 to terminal 2 by superposition; it is IN I12 current due to VA current due to IA 4 2 2 1:6 A 2 3 2 3 VA R 1 IA R1 R2 R1 R2

1/g(x) h 0 g(x + h)

Fig. 3-25

In the common-collector (CC) or emitter-follower (EF) ampli er of Fig. 3-26(a), VCC 12 V; RE 1 k ; RL 3 k , and CC ! 1. The Si transistor is biased so that VCEQ 5:7 V and has the collector characteristic of Fig. 3-26(b). (a) Construct the dc load line. (b) Find the value of . (c) Determine the value of RB .

lim [ 1/g(x)]

VCC VCC 12 12 mA Rdc RE 1 103 The intercepts are connected to form the dc load line shown on Fig. 3-26(b). (b) IBQ is determined by entering Fig. 3-26(b) at VCEQ 5:7 V and interpolating between iB curves to nd IBQ % 50 A. ICQ is then read as % 6:3 mA. Thus, (c) By KVL, VCC VBEQ 1 ICQ RE 12 0:7 126 1 6 10 3 1 103 126 105:05 k 50 10 6 ICQ 6:3 10 3 126 IBQ 50 10 6

4

The ampli er of Fig. 3-27 uses an Si transistor for which VBEQ 0:7 V. Assuming that the collector-emitter bias does not limit voltage excursion, classify the ampli er according to Table 3-4 if (a) VB 1:0 V and vS 0:25 cos !t V; b VB 1:0 V and vS 0:5 cos !t V, (c) VB 0:5 V and vS 0:6 cos !t V, (d) VB 0:7 V and vS 0:5 cos !t V.

lim g(x + h)